1. Field of the Invention
This invention relates to lead frames and semiconductor devices in which semiconductor chips mounted on lead frames are encapsulated in resins.
This application claims priority based on Japanese Patent Application No. 2003-151378 and Japanese Patent Application No. 2004-133376, the contents of which are incorporated herein by reference.
2. Description of the Related Art
FIGS. 19 and 20 show an example of a semiconductor device (designated by reference numeral ‘20’) encapsulated in a resin, and comprises a lead frame 11 made of a prescribed metal such as Cu alloy and 42 alloy, a semiconductor chip 18 that is joined with the upper surface of a die stage 12 of the lead frame 11 via a joining material 17 such as Ag paste and solder paste, a plurality of bonding wires 16 that electrically connect together electrodes of the semiconductor chip 18 and leads 15 of the lead frame 11, and a molded resin 19 made of a thermosetting resin such as epoxy resin for enclosing inner leads 15a of the leads 15, etc.
The semiconductor device 20 having the aforementioned constitution is temporarily mounted at a prescribed position of a circuit board, which is installed in an electronic device, and is then subjected to reflow soldering in which solder paste is melted and then solidified so that outer leads 15b of the leads 15 electrically join the circuit board, whereby it is possible to reliably mount the semiconductor device 20 at the prescribed position of the circuit board.
Conventionally, Sn—Pb solder (or Sn—Pb alloy) is used for the semiconductor device 20 to be mounted on the circuit board, wherein since a toxic substance such as lead (Pb) contained in the Sn—Pb solder may cause possible destruction of the natural environment and may have bad effects on human bodies, the Sn—Pb solder is recently being replaced with non-lead solder such as Sn—Ag—Cu alloy.
The non-lead solder may be advantageous for the protection of the environment because it does not contain toxic substance (or harmful material) such as lead (Pb); however, the melting point thereof (about 217° C.) is higher than that of the Sb—Pn solder (about 183° C.); therefore, it is necessary to increase the heating temperature in reflow soldering, whereby it is necessary to correspondingly increase the heat resistance in soldering with respect to the semiconductor device 20.
When the aforementioned semiconductor device 20 is heated upon reflow soldering, there occur easy-to-separate portions and hard-to-separate portions due to the relationship between different materials used for the constituent elements thereof. That is, relatively high adhesion is established in the boundary between the semiconductor chip 10 made of silicon and the molded resin 19, which may be therefore hard to separate from each other, while relatively low adhesion is established in the boundary between the die stage 12 made of the prescribed metal such as 42 alloy and the molded resin 19, which may be therefore easy to separate from each other. When separation occurs in the boundary between the die stage 12 and the molded resin 19, due to impact caused by the separation, the separated area extends towards the boundary between the semiconductor chip 18 and the molded resin 19, whereby it may grow as a crack (or cracks) so as to unexpectedly break the bonding wires 16. Such a phenomenon appears remarkably as the heating temperature in the reflow soldering becomes higher; hence, it is necessary to take appropriate measures to avoid occurrence this phenomenon.
Japanese Patent Application Publication No. 2000-49272 (see pages 4-5 and 7, as well as FIGS. 1, 2, and 19) discloses another example of a semiconductor device (designated by reference numeral ‘30’) in which as shown in FIGS. 21 to 23, a die stage 22 of a lead frame 21 is formed in an X-shape so as to reduce the overall joining area formed between the die stage 22 and a molded resin 29.
Japanese Patent Application Publication No. H07-211852 (see pages 2 and 4 as well as FIGS. 5 and 11) discloses a further example of a semiconductor device (designated by reference numeral ‘40’) in which as shown in FIGS. 24 and 25, an opening 32a is formed at the center portion of a die stage 32 of a lead frame 31 so as to reduce the overall joining area between the die stage 32 and a molded resin 39.
The aforementioned semiconductor device 30 is designed to reduce the adhered area formed between the die stage 22 and the molded resin 29 so that the separated area appearing in the boundary between them can be reduced, whereby it may be difficult for the separated area to extend towards the boundary between the semiconductor chip and the molded resin, regardless of the impact caused by the separation. However, when the semiconductor device 30 is joined to the circuit board by use of non-lead solder having a high melting point, separation may be easily caused due to heating.
In the semiconductor device 40, the peripheral portion of the die stage 32 extends outside of the peripheral portion of the semiconductor chip 38, so that separation may occur in such an ‘extended’ peripheral portion to cause impact by which the separated area may be further extended towards the boundary between the semiconductor chip 38 and the molded resin 39, whereby it may grow as a crack (or cracks) so as to unexpectedly break bonding wires 36.